Mehdi Goli 0b24e1cb5c [SYCL] Adding the SYCL memory model. The SYCL memory model provides : ...

* an interface for SYCL buffers to behave as a non-dereferenceable pointer
  * an interface for placeholder accessor to behave like a pointer on both host and device

2019-07-01 16:02:30 +01:00

..

AltiVec

Add masked_store_available to unpacket_traits

2019-05-02 14:52:58 -07:00

AVX

Add masked_store_available to unpacket_traits

2019-05-02 14:52:58 -07:00

AVX512

Various fixes for packet ops.

2019-06-20 11:47:49 -07:00

CUDA

renaming CUDA* to GPU* for some header files

2018-07-11 09:22:04 -04:00

Default

ICC does not support -fno-unsafe-math-optimizations

2019-03-22 09:26:24 +01:00

GPU

Fix CUDA compilation error for pselect<half>.

2019-06-28 12:07:29 -07:00

HIP/hcc

moving Half headers from CUDA dir to GPU dir, removing the HIP versions

2018-06-13 12:26:18 -04:00

MSA

Add masked_store_available to unpacket_traits

2019-05-02 14:52:58 -07:00

NEON

Add masked_store_available to unpacket_traits

2019-05-02 14:52:58 -07:00

SSE

Various fixes for packet ops.

2019-06-20 11:47:49 -07:00

SYCL

[SYCL] Adding the SYCL memory model. The SYCL memory model provides :

2019-07-01 16:02:30 +01:00

ZVector

Add masked_store_available to unpacket_traits

2019-05-02 14:52:58 -07:00