Files
eigen/Eigen/src
João P. L. de Carvalho 787f6ef025 Fix packed load/store for PowerPC's VSX
The vec_vsx_ld/vec_vsx_st builtins were wrongly used for aligned load/store. In fact, they perform unaligned memory access and, even when the address is 16-byte aligned, they are much slower (at least 2x) than their aligned counterparts.

For double/Packet2d vec_xl/vec_xst should be prefered over vec_ld/vec_st, although the latter works when casted to float/Packet4f.

Silencing some weird warning with throw but some GCC versions. Such warning are not thrown by Clang.
2019-08-09 16:02:55 -06:00
..
2018-09-18 04:15:01 -04:00
2018-03-11 10:01:44 -04:00
2019-02-19 14:00:15 +01:00
2017-03-07 11:25:58 +01:00
2019-05-13 19:02:30 +02:00
2019-05-23 15:31:12 +02:00