From c83e01f2d6113fb2f7dcc591b3364eb87b7a74aa Mon Sep 17 00:00:00 2001 From: Gael Guennebaud Date: Sun, 14 Sep 2014 19:38:49 +0200 Subject: [PATCH] Favor column major storage for inner products --- Eigen/src/Core/AssignEvaluator.h | 4 ++-- Eigen/src/Core/Product.h | 2 +- test/vectorization_logic.cpp | 16 +++++++++------- 3 files changed, 12 insertions(+), 10 deletions(-) diff --git a/Eigen/src/Core/AssignEvaluator.h b/Eigen/src/Core/AssignEvaluator.h index 521b8a93a..4e35e432e 100644 --- a/Eigen/src/Core/AssignEvaluator.h +++ b/Eigen/src/Core/AssignEvaluator.h @@ -55,8 +55,8 @@ private: }; enum { - DstIsRowMajor = DstEvaluator::Flags&RowMajorBit, - SrcIsRowMajor = SrcEvaluator::Flags&RowMajorBit, + DstIsRowMajor = DstFlags&RowMajorBit, + SrcIsRowMajor = SrcFlags&RowMajorBit, StorageOrdersAgree = (int(DstIsRowMajor) == int(SrcIsRowMajor)), MightVectorize = StorageOrdersAgree && (int(DstFlags) & int(SrcFlags) & ActualPacketAccessBit) diff --git a/Eigen/src/Core/Product.h b/Eigen/src/Core/Product.h index 0cf20f2e2..6825873d5 100644 --- a/Eigen/src/Core/Product.h +++ b/Eigen/src/Core/Product.h @@ -85,7 +85,7 @@ struct traits > #endif // The storage order is somewhat arbitrary here. The correct one will be determined through the evaluator. - Flags = ( MaxRowsAtCompileTime==1 + Flags = ( (MaxRowsAtCompileTime==1 && MaxColsAtCompileTime!=1) || ((LhsTraits::Flags&NoPreferredStorageOrderBit) && (RhsTraits::Flags&RowMajorBit)) || ((RhsTraits::Flags&NoPreferredStorageOrderBit) && (LhsTraits::Flags&RowMajorBit)) ) ? RowMajorBit : (MaxColsAtCompileTime==1 ? 0 : NoPreferredStorageOrderBit) diff --git a/test/vectorization_logic.cpp b/test/vectorization_logic.cpp index 42015e21b..303eb6cf0 100644 --- a/test/vectorization_logic.cpp +++ b/test/vectorization_logic.cpp @@ -30,13 +30,15 @@ std::string demangle_unrolling(int t) std::string demangle_flags(int f) { std::string res; - if(f&RowMajorBit) res += " | RowMajor"; - if(f&PacketAccessBit) res += " | Packet"; - if(f&LinearAccessBit) res += " | Linear"; - if(f&LvalueBit) res += " | Lvalue"; - if(f&DirectAccessBit) res += " | Direct"; - if(f&AlignedBit) res += " | Aligned"; - if(f&NestByRefBit) res += " | NestByRef"; + if(f&RowMajorBit) res += " | RowMajor"; + if(f&PacketAccessBit) res += " | Packet"; + if(f&LinearAccessBit) res += " | Linear"; + if(f&LvalueBit) res += " | Lvalue"; + if(f&DirectAccessBit) res += " | Direct"; + if(f&AlignedBit) res += " | Aligned"; + if(f&NestByRefBit) res += " | NestByRef"; + if(f&NoPreferredStorageOrderBit) res += " | NoPreferredStorageOrderBit"; + return res; }