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Fix typos
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committed by
Charles Schlosser
parent
fd98cc49f1
commit
c593e9e948
@@ -898,7 +898,7 @@ containing the real part of the complex values of the original tensor.
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### (Operation) imag()
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Returns a tensor with the same dimensions as the orginal tensor
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Returns a tensor with the same dimensions as the original tensor
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containing the imaginary part of the complex values of the original
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tensor.
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@@ -910,7 +910,7 @@ exponent.
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The type of the exponent, Scalar, is always the same as the type of the
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tensor coefficients. For example, only integer exponents can be used in
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conjuntion with tensors of integer values.
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conjunction with tensors of integer values.
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You can use cast() to lift this restriction. For example this computes
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cubic roots of an int Tensor:
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@@ -104,10 +104,10 @@ struct TTPanelSize {
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static EIGEN_CONSTEXPR StorageIndex TileSizeDimM = LocalThreadSizeM * WorkLoadPerThreadM;
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// TileSizeDimN: determines the tile size for the n dimension
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static EIGEN_CONSTEXPR StorageIndex TileSizeDimN = LocalThreadSizeN * WorkLoadPerThreadN;
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// LoadPerThreadLhs: determines workload per thread for loading Lhs Tensor. This must be divisable by packetsize
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// LoadPerThreadLhs: determines workload per thread for loading Lhs Tensor. This must be divisible by packetsize
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static EIGEN_CONSTEXPR StorageIndex LoadPerThreadLhs =
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((TileSizeDimK * WorkLoadPerThreadM * WorkLoadPerThreadN) / (TileSizeDimN));
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// LoadPerThreadRhs: determines workload per thread for loading Rhs Tensor. This must be divisable by packetsize
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// LoadPerThreadRhs: determines workload per thread for loading Rhs Tensor. This must be divisible by packetsize
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static EIGEN_CONSTEXPR StorageIndex LoadPerThreadRhs =
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((TileSizeDimK * WorkLoadPerThreadM * WorkLoadPerThreadN) / (TileSizeDimM));
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// BC : determines if supporting bank conflict is required
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@@ -674,7 +674,7 @@ class TensorContractionKernel {
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for (StorageIndex wLPTN = 0; wLPTN < Properties::WorkLoadPerThreadN / PrivateNStride; wLPTN++) {
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// output leading dimension
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StorageIndex outputLD = 0;
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// When local memory is used the PrivateNstride is always 1 because the coalesed access on N is loaded into Local
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// When local memory is used the PrivateNstride is always 1 because the coalesced access on N is loaded into Local
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// memory and extracting from local to global is the same as no transposed version. However, when local memory is
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// not used and RHS is transposed we packetize the load for RHS.
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EIGEN_UNROLL_LOOP
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@@ -898,7 +898,7 @@ class TensorContractionKernel {
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EIGEN_CONSTEXPR StorageIndex LSD = InputBlockProperties::is_rhs ? LSDR : LSDL;
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static_assert(((LocalOffset % (TileSizeDimNC / InputBlockProperties::nc_stride) == 0) &&
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(LocalOffset % (Properties::TileSizeDimK / InputBlockProperties::c_stride) == 0)),
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" LocalOffset must be divisable by stride");
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" LocalOffset must be divisible by stride");
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const StorageIndex &NC = InputBlockProperties::is_rhs ? triple_dim.N : triple_dim.M;
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StorageIndex localThreadNC = local_index.first;
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StorageIndex localThreadC = local_index.second;
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@@ -36,7 +36,7 @@ EIGEN_DEVICE_FUNC EIGEN_STRONG_INLINE T* constCast(const T* data) {
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// used for referring to a Pointer on TensorEvaluator class. While the TensorExpression
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// is a device-agnostic type and need MakePointer class for type conversion,
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// the TensorEvaluator class can be specialized for a device, hence it is possible
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// to construct different types of temproray storage memory in TensorEvaluator
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// to construct different types of temporary storage memory in TensorEvaluator
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// for different devices by specializing the following StorageMemory class.
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template <typename T, typename device>
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struct StorageMemory : MakePointer<T> {};
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@@ -136,7 +136,7 @@ class UniformRandomGenerator {
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// thread but for SYCL ((CLOCK * 6364136223846793005ULL) + 0xda3e39cb94b95bdbULL) is passed to each thread and each
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// thread adds the (global_thread_id* 6364136223846793005ULL) for itself only once, in order to complete the
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// construction similar to CUDA Therefore, the thread Id injection is not available at this stage.
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// However when the operator() is called the thread ID will be available. So inside the opeator,
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// However when the operator() is called the thread ID will be available. So inside the operator,
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// we add the thrreadID, BlockId,... (which is equivalent of i)
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// to the seed and construct the unique m_state per thead similar to cuda.
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m_exec_once = false;
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@@ -433,7 +433,7 @@ struct PartialReducerLauncher {
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EIGEN_CONSTEXPR Index localRange = PannelParameters::LocalThreadSizeP * PannelParameters::LocalThreadSizeR;
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// In this step, we force the code not to be more than 2-step reduction:
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// Our empirical research shows that if each thread reduces at least 64
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// elemnts individually, we get better performance. However, this can change
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// elements individually, we get better performance. However, this can change
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// on different platforms. In this step we force the code not to be
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// morthan step reduction: Our empirical research shows that for inner_most
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// dim reducer, it is better to have 8 group in a reduce dimension for sizes
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@@ -495,7 +495,7 @@ struct FullReducer<Self, Op, Eigen::SyclDevice, Vectorizable> {
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typename Self::Index inputSize = self.impl().dimensions().TotalSize();
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// In this step we force the code not to be more than 2-step reduction:
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// Our empirical research shows that if each thread reduces at least 512
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// elemnts individually, we get better performance.
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// elements individually, we get better performance.
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const Index reductionPerThread = 2048;
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// const Index num_work_group =
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Index reductionGroup = dev.getPowerOfTwo(
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