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Improve slice-vectorization logic for redux (significant speed-up for reduxion of blocks)
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@@ -230,8 +230,13 @@ struct vectorization_logic
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VERIFY(test_redux(Matrix44(),
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LinearVectorizedTraversal,NoUnrolling));
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VERIFY(test_redux(Matrix44().template block<(Matrix1::Flags&RowMajorBit)?4:PacketSize,(Matrix1::Flags&RowMajorBit)?PacketSize:4>(1,2),
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DefaultTraversal,CompleteUnrolling));
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if(PacketSize>1) {
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VERIFY(test_redux(Matrix44().template block<(Matrix1::Flags&RowMajorBit)?4:PacketSize,(Matrix1::Flags&RowMajorBit)?PacketSize:4>(1,2),
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SliceVectorizedTraversal,CompleteUnrolling));
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VERIFY(test_redux(Matrix44().template block<(Matrix1::Flags&RowMajorBit)?2:PacketSize,(Matrix1::Flags&RowMajorBit)?PacketSize:2>(1,2),
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DefaultTraversal,CompleteUnrolling));
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}
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VERIFY(test_redux(Matrix44c().template block<2*PacketSize,1>(1,2),
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LinearVectorizedTraversal,CompleteUnrolling));
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@@ -375,8 +380,13 @@ struct vectorization_logic_half
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VERIFY(test_redux(Matrix35(),
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LinearVectorizedTraversal,CompleteUnrolling));
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VERIFY(test_redux(Matrix57().template block<PacketSize,3>(1,0),
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DefaultTraversal,CompleteUnrolling));
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VERIFY(test_redux(Matrix57().template block<PacketSize==1?2:PacketSize,3>(1,0),
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SliceVectorizedTraversal,CompleteUnrolling));
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if(PacketSize>1) {
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VERIFY(test_redux(Matrix57().template block<PacketSize,2>(1,0),
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DefaultTraversal,CompleteUnrolling));
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}
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VERIFY((test_assign<
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Map<Matrix<Scalar,EIGEN_PLAIN_ENUM_MAX(2,PacketSize),EIGEN_PLAIN_ENUM_MAX(2,PacketSize)>, AlignedMax, InnerStride<3*PacketSize> >,
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