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Fix rint SSE/NEON again, using optimization barrier.
This is a new version of !423, which failed for MSVC. Defined `EIGEN_OPTIMIZATION_BARRIER(X)` that uses inline assembly to prevent operations involving `X` from crossing that barrier. Should work on most `GNUC` compatible compilers (MSVC doesn't seem to need this). This is a modified version adapted from what was used in `psincos_float` and tested on more platforms (see #1674, https://godbolt.org/z/73ezTG). Modified `rint` to use the barrier to prevent the add/subtract rounding trick from being optimized away. Also fixed an edge case for large inputs that get bumped up a power of two and ends up rounding away more than just the fractional part. If we are over `2^digits` then just return the input. This edge case was missed in the test since the test was comparing approximate equality, which was still satisfied. Adding a strict equality option catches it.
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@@ -51,7 +51,11 @@
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#ifndef EIGEN_STACK_ALLOCATION_LIMIT
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// 131072 == 128 KB
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#define EIGEN_STACK_ALLOCATION_LIMIT 131072
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#if defined(__AVX512F__)
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#define EIGEN_STACK_ALLOCATION_LIMIT 0
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#else
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#define EIGEN_STACK_ALLOCATION_LIMIT 16384
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#endif
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#endif
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//------------------------------------------------------------------------------------------
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@@ -1063,6 +1067,64 @@ namespace Eigen {
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#endif
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// Acts as a barrier preventing operations involving `X` from crossing. This
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// occurs, for example, in the fast rounding trick where a magic constant is
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// added then subtracted, which is otherwise compiled away with -ffast-math.
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//
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// See bug 1674
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#if !defined(EIGEN_OPTIMIZATION_BARRIER)
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#if EIGEN_COMP_GNUC
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// According to https://gcc.gnu.org/onlinedocs/gcc/Constraints.html:
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// X: Any operand whatsoever.
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// r: A register operand is allowed provided that it is in a general
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// register.
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// g: Any register, memory or immediate integer operand is allowed, except
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// for registers that are not general registers.
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// w: (AArch32/AArch64) Floating point register, Advanced SIMD vector
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// register or SVE vector register.
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// x: (SSE) Any SSE register.
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// (AArch64) Like w, but restricted to registers 0 to 15 inclusive.
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// v: (PowerPC) An Altivec vector register.
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// wa:(PowerPC) A VSX register.
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//
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// "X" (uppercase) should work for all cases, though this seems to fail for
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// some versions of GCC for arm/aarch64 with
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// "error: inconsistent operand constraints in an 'asm'"
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// Clang x86_64/arm/aarch64 seems to require "g" to support both scalars and
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// vectors, otherwise
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// "error: non-trivial scalar-to-vector conversion, possible invalid
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// constraint for vector type"
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//
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// GCC for ppc64le generates an internal compiler error with x/X/g.
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// GCC for AVX generates an internal compiler error with X.
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//
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// Tested on icc/gcc/clang for sse, avx, avx2, avx512dq
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// gcc for arm, aarch64,
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// gcc for ppc64le,
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// both vectors and scalars.
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//
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// Note that this is restricted to plain types - this will not work
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// directly for std::complex<T>, Eigen::half, Eigen::bfloat16. For these,
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// you will need to apply to the underlying POD type.
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#if EIGEN_ARCH_PPC
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// General, Altivec, VSX.
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#define EIGEN_OPTIMIZATION_BARRIER(X) __asm__ ("" : "+r,v,wa" (X));
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#elif EIGEN_ARCH_ARM_OR_ARM64
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// General, NEON.
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#define EIGEN_OPTIMIZATION_BARRIER(X) __asm__ ("" : "+g,w" (X));
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#elif EIGEN_ARCH_i386_OR_x86_64
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// General, SSE.
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#define EIGEN_OPTIMIZATION_BARRIER(X) __asm__ ("" : "+g,x" (X));
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#else
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// Not implemented for other architectures.
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#define EIGEN_OPTIMIZATION_BARRIER(X)
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#endif
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#else
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// Not implemented for other compilers.
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#define EIGEN_OPTIMIZATION_BARRIER(X)
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#endif
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#endif
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#if EIGEN_COMP_MSVC
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// NOTE MSVC often gives C4127 warnings with compiletime if statements. See bug 1362.
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// This workaround is ugly, but it does the job.
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