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https://gitlab.com/libeigen/eigen.git
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* split PacketMath.h to SSE and Altivec specific files
* improved the flexibility of the new product implementation, now all sizes seems to be properly handled.
This commit is contained in:
Gael Guennebaud
@@ -193,6 +193,17 @@ template<typename Lhs, typename Rhs, int EvalMode> class Product : ei_no_assignm
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typedef typename ei_traits<Product>::_LhsNested _LhsNested;
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typedef typename ei_traits<Product>::_RhsNested _RhsNested;
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enum {
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PacketSize = ei_packet_traits<Scalar>::size,
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#if (defined __i386__)
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// i386 architectures provides only 8 xmmm register,
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// so let's reduce the max number of rows processed at once
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MaxBlockRows = 4,
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#else
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MaxBlockRows = 8,
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#endif
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};
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Product(const Lhs& lhs, const Rhs& rhs)
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: m_lhs(lhs), m_rhs(rhs)
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{
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@@ -200,7 +211,18 @@ template<typename Lhs, typename Rhs, int EvalMode> class Product : ei_no_assignm
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}
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/** \internal */
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template<typename DestDerived> void _cacheFriendlyEval(DestDerived& res) const;
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template<typename DestDerived>
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void _cacheFriendlyEval(DestDerived& res) const;
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/** \internal */
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template<typename DestDerived, int RhsAlignment, int ResAlignment>
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void _cacheFriendlyEvalImpl(DestDerived& res) const __attribute__ ((noinline));
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/** \internal */
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template<typename DestDerived, int RhsAlignment, int ResAlignment, int BlockRows>
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void _cacheFriendlyEvalKernel(DestDerived& res,
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int l2i, int l2j, int l2k, int l1i,
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int l2blockRowEnd, int l2blockColEnd, int l2blockSizeEnd, const Scalar* block) const EIGEN_DONT_INLINE;
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private:
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@@ -299,13 +321,134 @@ template<typename Derived>
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template<typename Lhs, typename Rhs>
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Derived& MatrixBase<Derived>::lazyAssign(const Product<Lhs,Rhs,CacheOptimalProduct>& product)
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{
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product._cacheFriendlyEval(*this);
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product._cacheFriendlyEval(derived());
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return derived();
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}
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template<typename Lhs, typename Rhs, int EvalMode>
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template<typename DestDerived>
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void Product<Lhs,Rhs,EvalMode>::_cacheFriendlyEval(DestDerived& res) const
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{
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const bool rhsIsAligned = (m_lhs.cols()%PacketSize == 0);
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const bool resIsAligned = ((_rows()%PacketSize) == 0);
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if (rhsIsAligned && resIsAligned)
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_cacheFriendlyEvalImpl<DestDerived, Aligned, Aligned>(res);
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else if (rhsIsAligned && (!resIsAligned))
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_cacheFriendlyEvalImpl<DestDerived, Aligned, UnAligned>(res);
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else if ((!rhsIsAligned) && resIsAligned)
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_cacheFriendlyEvalImpl<DestDerived, UnAligned, Aligned>(res);
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else
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_cacheFriendlyEvalImpl<DestDerived, UnAligned, UnAligned>(res);
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}
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template<typename Lhs, typename Rhs, int EvalMode>
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template<typename DestDerived, int RhsAlignment, int ResAlignment, int BlockRows>
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void Product<Lhs,Rhs,EvalMode>::_cacheFriendlyEvalKernel(DestDerived& res,
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int l2i, int l2j, int l2k, int l1i,
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int l2blockRowEnd, int l2blockColEnd, int l2blockSizeEnd, const Scalar* block) const
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{
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asm("#eigen begin kernel");
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ei_internal_assert(BlockRows<=8);
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// NOTE: sounds like we cannot rely on meta-unrolling to access dst[I] without enforcing GCC
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// to create the dst's elements in memory, hence killing the performance.
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for(int l1j=l2j; l1j<l2blockColEnd; l1j+=1)
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{
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int offsetblock = l2k * (l2blockRowEnd-l2i) + (l1i-l2i)*(l2blockSizeEnd-l2k) - l2k*BlockRows;
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const Scalar* localB = &block[offsetblock];
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int l1jsize = l1j * m_lhs.cols(); //TODO find a better way to optimize address computation ?
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// don't worry, dst is a set of registers
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PacketScalar dst[BlockRows];
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dst[0] = ei_pset1(Scalar(0.));
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switch(BlockRows)
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{
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case 8: dst[7] = dst[0];
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case 7: dst[6] = dst[0];
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case 6: dst[5] = dst[0];
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case 5: dst[4] = dst[0];
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case 4: dst[3] = dst[0];
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case 3: dst[2] = dst[0];
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case 2: dst[1] = dst[0];
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default: break;
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}
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// let's declare a few other temporary registers
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PacketScalar tmp, tmp1;
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// unaligned loads are expensive, therefore let's preload the next element in advance
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if (RhsAlignment==UnAligned)
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tmp1 = ei_ploadu(&m_rhs.derived().data()[l1jsize+l2k]);
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for(int k=l2k; k<l2blockSizeEnd; k+=PacketSize)
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{
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// FIXME if we don't cache l1j*m_lhs.cols() then the performance are poor,
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// let's directly access to the data
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//PacketScalar tmp = m_rhs.template packetCoeff<Aligned>(k, l1j);
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if (RhsAlignment==Aligned)
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{
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tmp = ei_pload(&m_rhs.data()[l1jsize + k]);
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}
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else
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{
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tmp = tmp1;
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if (k+PacketSize<l2blockSizeEnd)
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tmp1 = ei_ploadu(&m_rhs.data()[l1jsize + k+PacketSize]);
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}
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dst[0] = ei_pmadd(tmp, ei_pload(&(localB[k*BlockRows ])), dst[0]);
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if (BlockRows>=2) dst[1] = ei_pmadd(tmp, ei_pload(&(localB[k*BlockRows+ PacketSize])), dst[1]);
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if (BlockRows>=3) dst[2] = ei_pmadd(tmp, ei_pload(&(localB[k*BlockRows+2*PacketSize])), dst[2]);
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if (BlockRows>=4) dst[3] = ei_pmadd(tmp, ei_pload(&(localB[k*BlockRows+3*PacketSize])), dst[3]);
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if (BlockRows>=5) dst[4] = ei_pmadd(tmp, ei_pload(&(localB[k*BlockRows+4*PacketSize])), dst[4]);
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if (BlockRows>=6) dst[5] = ei_pmadd(tmp, ei_pload(&(localB[k*BlockRows+5*PacketSize])), dst[5]);
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if (BlockRows>=7) dst[6] = ei_pmadd(tmp, ei_pload(&(localB[k*BlockRows+6*PacketSize])), dst[6]);
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if (BlockRows>=8) dst[7] = ei_pmadd(tmp, ei_pload(&(localB[k*BlockRows+7*PacketSize])), dst[7]);
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}
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enum {
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// Number of rows we can reduce per packet
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PacketRows = (ResAlignment==Aligned && PacketSize>1) ? (BlockRows / PacketSize) : 0,
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// First row index from which we have to to do redux once at a time
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RemainingStart = PacketSize * PacketRows
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};
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// we have up to 4 packets (for doubles: 8 rows / 2)
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if (PacketRows>=1)
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res.template writePacketCoeff<Aligned>(l1i, l1j,
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ei_padd(res.template packetCoeff<Aligned>(l1i, l1j), ei_predux(&(dst[0]))));
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if (PacketRows>=2)
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res.template writePacketCoeff<Aligned>(l1i+PacketSize, l1j,
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ei_padd(res.template packetCoeff<Aligned>(l1i+PacketSize, l1j), ei_predux(&(dst[PacketSize]))));
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if (PacketRows>=3)
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res.template writePacketCoeff<Aligned>(l1i+2*PacketSize, l1j,
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ei_padd(res.template packetCoeff<Aligned>(l1i+2*PacketSize, l1j), ei_predux(&(dst[2*PacketSize]))));
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if (PacketRows>=4)
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res.template writePacketCoeff<Aligned>(l1i+3*PacketSize, l1j,
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ei_padd(res.template packetCoeff<Aligned>(l1i+3*PacketSize, l1j), ei_predux(&(dst[3*PacketSize]))));
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// process the remaining rows one at a time
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if (RemainingStart<=0 && BlockRows>=1) res.coeffRef(l1i+0, l1j) += ei_predux(dst[0]);
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if (RemainingStart<=1 && BlockRows>=2) res.coeffRef(l1i+1, l1j) += ei_predux(dst[1]);
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if (RemainingStart<=2 && BlockRows>=3) res.coeffRef(l1i+2, l1j) += ei_predux(dst[2]);
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if (RemainingStart<=3 && BlockRows>=4) res.coeffRef(l1i+3, l1j) += ei_predux(dst[3]);
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if (RemainingStart<=4 && BlockRows>=5) res.coeffRef(l1i+4, l1j) += ei_predux(dst[4]);
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if (RemainingStart<=5 && BlockRows>=6) res.coeffRef(l1i+5, l1j) += ei_predux(dst[5]);
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if (RemainingStart<=6 && BlockRows>=7) res.coeffRef(l1i+6, l1j) += ei_predux(dst[6]);
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if (RemainingStart<=7 && BlockRows>=8) res.coeffRef(l1i+7, l1j) += ei_predux(dst[7]);
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asm("#eigen end kernel");
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}
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}
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template<typename Lhs, typename Rhs, int EvalMode>
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template<typename DestDerived, int RhsAlignment, int ResAlignment>
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void Product<Lhs,Rhs,EvalMode>::_cacheFriendlyEvalImpl(DestDerived& res) const
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{
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// allow direct access to data for benchmark purpose
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const Scalar* __restrict__ a = m_lhs.derived().data();
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@@ -316,21 +459,13 @@ void Product<Lhs,Rhs,EvalMode>::_cacheFriendlyEval(DestDerived& res) const
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// then we don't need to clear res and avoid and additional mat-mat sum
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// res.setZero();
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const int ps = ei_packet_traits<Scalar>::size; // size of a packet
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#if (defined __i386__)
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// i386 architectures provides only 8 xmmm register,
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// so let's reduce the max number of rows processed at once
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const int bw = 4; // number of rows treated at once
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#else
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const int bw = 8; // number of rows treated at once
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#endif
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const int bs = ps * bw; // total number of elements treated at once
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const int bs = PacketSize * MaxBlockRows; // total number of elements treated at once
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const int rows = _rows();
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const int cols = _cols();
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const int size = m_lhs.cols(); // third dimension of the product
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const int remainingSize = m_lhs.cols()%PacketSize;
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const int size = m_lhs.cols() - remainingSize; // third dimension of the product clamped to packet boundaries
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const int l2blocksize = 256 > _cols() ? _cols() : 256;
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const bool rhsIsAligned = ((size%ps) == 0);
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const bool resIsAligned = ((cols%ps) == 0);
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// FIXME use calloca ?? (allocation on the stack)
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Scalar* __restrict__ block = new Scalar[l2blocksize*size];
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// loops on each L2 cache friendly blocks of the result
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@@ -348,23 +483,23 @@ void Product<Lhs,Rhs,EvalMode>::_cacheFriendlyEval(DestDerived& res) const
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{
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const int l2blockSizeEnd = std::min(l2k+l2blocksize, size);
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for (int i = l2i; i<l2blockRowEndBW; i+=bw)
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for (int i = l2i; i<l2blockRowEndBW; i+=MaxBlockRows)
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{
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for (int k=l2k; k<l2blockSizeEnd; k+=ps)
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for (int k=l2k; k<l2blockSizeEnd; k+=PacketSize)
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{
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// TODO write these two loops using meta unrolling
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// negligible for large matrices but useful for small ones
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for (int w=0; w<bw; ++w)
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for (int s=0; s<ps; ++s)
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for (int w=0; w<MaxBlockRows; ++w)
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for (int s=0; s<PacketSize; ++s)
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block[count++] = m_lhs.coeff(i+w,k+s);
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}
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}
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if (l2blockRowRemaining>0)
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{
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for (int k=l2k; k<l2blockSizeEnd; k+=ps)
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for (int k=l2k; k<l2blockSizeEnd; k+=PacketSize)
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{
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for (int w=0; w<l2blockRowRemaining; ++w)
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for (int s=0; s<ps; ++s)
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for (int s=0; s<PacketSize; ++s)
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block[count++] = m_lhs.coeff(l2blockRowEndBW+w,k+s);
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}
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}
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@@ -376,19 +511,21 @@ void Product<Lhs,Rhs,EvalMode>::_cacheFriendlyEval(DestDerived& res) const
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for(int l2k=0; l2k<size; l2k+=l2blocksize)
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{
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// acumulate a full row of current a block time 4 cols of current a block
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// to a 1x4 c block
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// acumulate a bw rows of lhs time a single column of rhs to a bw x 1 block of res
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int l2blockSizeEnd = std::min(l2k+l2blocksize, size);
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// for each 4x1 result's block sub blocks...
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for(int l1i=l2i; l1i<l2blockRowEndBW; l1i+=bw)
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// for each bw x 1 result's block
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for(int l1i=l2i; l1i<l2blockRowEndBW; l1i+=MaxBlockRows)
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{
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_cacheFriendlyEvalKernel<DestDerived, RhsAlignment, ResAlignment, MaxBlockRows>(
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res, l2i, l2j, l2k, l1i, l2blockRowEnd, l2blockColEnd, l2blockSizeEnd, block);
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#if 0
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for(int l1j=l2j; l1j<l2blockColEnd; l1j+=1)
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{
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int offsetblock = l2k * (l2blockRowEnd-l2i) + (l1i-l2i)*(l2blockSizeEnd-l2k) - l2k*bw/*bs*/;
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const Scalar* localB = &block[offsetblock];
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int l1jsize = l1j * size; //TODO find a better way to optimize address computation ?
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int l1jsize = l1j * m_lhs.cols(); //TODO find a better way to optimize address computation ?
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PacketScalar dst[bw];
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dst[0] = ei_pset1(Scalar(0.));
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@@ -408,7 +545,8 @@ void Product<Lhs,Rhs,EvalMode>::_cacheFriendlyEval(DestDerived& res) const
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asm("#eigen begincore");
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for(int k=l2k; k<l2blockSizeEnd; k+=ps)
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{
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//PacketScalar tmp = m_rhs.packetCoeff(k, l1j);
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// PacketScalar tmp = m_rhs.template packetCoeff<Aligned>(k, l1j);
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// TODO make this branching compile time (costly for doubles)
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if (rhsIsAligned)
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tmp = ei_pload(&m_rhs.derived().data()[l1jsize + k]);
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else
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@@ -436,21 +574,61 @@ void Product<Lhs,Rhs,EvalMode>::_cacheFriendlyEval(DestDerived& res) const
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}
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}
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res.template writePacketCoeff<Aligned>(l1i, l1j, ei_padd(res.template packetCoeff<Aligned>(l1i, l1j), ei_predux(dst)));
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if (ps==2)
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res.template writePacketCoeff<Aligned>(l1i+2,l1j, ei_padd(res.template packetCoeff<Aligned>(l1i+2,l1j), ei_predux(&(dst[2]))));
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if (bw==8)
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// if (resIsAligned)
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{
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res.template writePacketCoeff<Aligned>(l1i+4,l1j, ei_padd(res.template packetCoeff<Aligned>(l1i+4,l1j), ei_predux(&(dst[4]))));
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res.template writePacketCoeff<Aligned>(l1i, l1j, ei_padd(res.template packetCoeff<Aligned>(l1i, l1j), ei_predux(dst)));
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if (ps==2)
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res.template writePacketCoeff<Aligned>(l1i+6,l1j, ei_padd(res.template packetCoeff<Aligned>(l1i+6,l1j), ei_predux(&(dst[6]))));
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res.template writePacketCoeff<Aligned>(l1i+2,l1j, ei_padd(res.template packetCoeff<Aligned>(l1i+2,l1j), ei_predux(&(dst[2]))));
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if (bw==8)
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{
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res.template writePacketCoeff<Aligned>(l1i+4,l1j, ei_padd(res.template packetCoeff<Aligned>(l1i+4,l1j), ei_predux(&(dst[4]))));
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if (ps==2)
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res.template writePacketCoeff<Aligned>(l1i+6,l1j, ei_padd(res.template packetCoeff<Aligned>(l1i+6,l1j), ei_predux(&(dst[6]))));
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}
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}
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// else
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// {
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// // TODO uncommenting this code kill the perf, even though it is never called !!
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// // TODO optimize this loop
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// // TODO is it better to do one redux at once or packet reduxes + unaligned store ?
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// for (int w = 0; w<bw; ++w)
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// res.coeffRef(l1i+w, l1j) += ei_predux(dst[w]);
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// std::cout << "!\n";
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// }
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asm("#eigen endcore");
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}
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#endif
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}
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if (l2blockRowRemaining>0)
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{
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// this is an attempt to build an array of kernels, but I did not manage to get it compiles
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// typedef void (*Kernel)(DestDerived& , int, int, int, int, int, int, int, const Scalar*);
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// Kernel kernels[8];
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// kernels[0] = (Kernel)(&Product<Lhs,Rhs,EvalMode>::template _cacheFriendlyEvalKernel<DestDerived, RhsAlignment, ResAlignment, 1>);
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// kernels[l2blockRowRemaining](res, l2i, l2j, l2k, l2blockRowEndBW, l2blockRowEnd, l2blockColEnd, l2blockSizeEnd, block);
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switch(l2blockRowRemaining)
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{
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case 1:_cacheFriendlyEvalKernel<DestDerived, RhsAlignment, ResAlignment, 1>(
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res, l2i, l2j, l2k, l2blockRowEndBW, l2blockRowEnd, l2blockColEnd, l2blockSizeEnd, block); break;
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case 2:_cacheFriendlyEvalKernel<DestDerived, RhsAlignment, ResAlignment, 2>(
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res, l2i, l2j, l2k, l2blockRowEndBW, l2blockRowEnd, l2blockColEnd, l2blockSizeEnd, block); break;
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case 3:_cacheFriendlyEvalKernel<DestDerived, RhsAlignment, ResAlignment, 3>(
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res, l2i, l2j, l2k, l2blockRowEndBW, l2blockRowEnd, l2blockColEnd, l2blockSizeEnd, block); break;
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case 4:_cacheFriendlyEvalKernel<DestDerived, RhsAlignment, ResAlignment, 4>(
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res, l2i, l2j, l2k, l2blockRowEndBW, l2blockRowEnd, l2blockColEnd, l2blockSizeEnd, block); break;
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case 5:_cacheFriendlyEvalKernel<DestDerived, RhsAlignment, ResAlignment, 5>(
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res, l2i, l2j, l2k, l2blockRowEndBW, l2blockRowEnd, l2blockColEnd, l2blockSizeEnd, block); break;
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case 6:_cacheFriendlyEvalKernel<DestDerived, RhsAlignment, ResAlignment, 6>(
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res, l2i, l2j, l2k, l2blockRowEndBW, l2blockRowEnd, l2blockColEnd, l2blockSizeEnd, block); break;
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case 7:_cacheFriendlyEvalKernel<DestDerived, RhsAlignment, ResAlignment, 7>(
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res, l2i, l2j, l2k, l2blockRowEndBW, l2blockRowEnd, l2blockColEnd, l2blockSizeEnd, block); break;
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default:
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ei_internal_assert(false && "internal error"); break;
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}
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#if 0
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// TODO optimize this part using a generic templated function that processes N rows
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// here we process the remaining l2blockRowRemaining rows
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for(int l1j=l2j; l1j<l2blockColEnd; l1j+=1)
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@@ -460,13 +638,13 @@ void Product<Lhs,Rhs,EvalMode>::_cacheFriendlyEval(DestDerived& res) const
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int l1jsize = l1j * size;
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||||
PacketScalar dst[bw];
|
||||
PacketScalar dst[MaxBlockRows];
|
||||
dst[0] = ei_pset1(Scalar(0.));
|
||||
for (int w = 1; w<l2blockRowRemaining; ++w)
|
||||
dst[w] = dst[0];
|
||||
PacketScalar b0, b1, tmp;
|
||||
asm("#eigen begincore dynamic");
|
||||
for(int k=l2k; k<l2blockSizeEnd; k+=ps)
|
||||
for(int k=l2k; k<l2blockSizeEnd; k+=PacketSize)
|
||||
{
|
||||
//PacketScalar tmp = m_rhs.packetCoeff(k, l1j);
|
||||
if (rhsIsAligned)
|
||||
@@ -476,7 +654,7 @@ void Product<Lhs,Rhs,EvalMode>::_cacheFriendlyEval(DestDerived& res) const
|
||||
|
||||
// TODO optimize this loop
|
||||
for (int w = 0; w<l2blockRowRemaining; ++w)
|
||||
dst[w] = ei_pmadd(tmp, ei_pload(&(localB[k*l2blockRowRemaining+w*ps])), dst[w]);
|
||||
dst[w] = ei_pmadd(tmp, ei_pload(&(localB[k*l2blockRowRemaining+w*PacketSize])), dst[w]);
|
||||
}
|
||||
|
||||
// TODO optimize this loop
|
||||
@@ -485,11 +663,23 @@ void Product<Lhs,Rhs,EvalMode>::_cacheFriendlyEval(DestDerived& res) const
|
||||
|
||||
asm("#eigen endcore dynamic");
|
||||
}
|
||||
#endif
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// handle the part which cannot be processed by the vectorized path
|
||||
if (remainingSize)
|
||||
{
|
||||
res += Product<
|
||||
Block<typename ei_unconst<_LhsNested>::type,Dynamic,Dynamic>,
|
||||
Block<typename ei_unconst<_RhsNested>::type,Dynamic,Dynamic>,
|
||||
NormalProduct>(
|
||||
m_lhs.block(0,size, _rows(), remainingSize),
|
||||
m_rhs.block(size,0, remainingSize, _cols())).lazy();
|
||||
}
|
||||
|
||||
delete[] block;
|
||||
}
|
||||
|
||||
|
||||
Reference in New Issue
Block a user