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https://gitlab.com/libeigen/eigen.git
synced 2026-04-10 11:34:33 +08:00
Eigen cost model part 1. This implements a basic recursive framework to estimate the cost of evaluating tensor expressions.
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@@ -134,6 +134,10 @@ struct TensorEvaluator<const TensorChippingOp<DimId, ArgType>, Device>
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typedef typename XprType::Index Index;
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typedef DSizes<Index, NumDims> Dimensions;
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typedef typename XprType::Scalar Scalar;
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typedef typename XprType::CoeffReturnType CoeffReturnType;
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typedef typename PacketType<CoeffReturnType, Device>::type PacketReturnType;
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static const int PacketSize = internal::unpacket_traits<PacketReturnType>::size;
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enum {
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// Alignment can't be guaranteed at compile time since it depends on the
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@@ -180,9 +184,6 @@ struct TensorEvaluator<const TensorChippingOp<DimId, ArgType>, Device>
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m_inputOffset = m_stride * op.offset();
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}
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typedef typename XprType::CoeffReturnType CoeffReturnType;
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typedef typename PacketType<CoeffReturnType, Device>::type PacketReturnType;
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EIGEN_DEVICE_FUNC EIGEN_STRONG_INLINE const Dimensions& dimensions() const { return m_dimensions; }
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EIGEN_DEVICE_FUNC EIGEN_STRONG_INLINE bool evalSubExprsIfNeeded(Scalar* /*data*/) {
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@@ -202,17 +203,16 @@ struct TensorEvaluator<const TensorChippingOp<DimId, ArgType>, Device>
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template<int LoadMode>
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EIGEN_DEVICE_FUNC EIGEN_STRONG_INLINE PacketReturnType packet(Index index) const
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{
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const int packetSize = internal::unpacket_traits<PacketReturnType>::size;
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EIGEN_STATIC_ASSERT(packetSize > 1, YOU_MADE_A_PROGRAMMING_MISTAKE)
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eigen_assert(index+packetSize-1 < dimensions().TotalSize());
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EIGEN_STATIC_ASSERT(PacketSize > 1, YOU_MADE_A_PROGRAMMING_MISTAKE)
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eigen_assert(index+PacketSize-1 < dimensions().TotalSize());
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if ((static_cast<int>(Layout) == static_cast<int>(ColMajor) && m_dim.actualDim() == 0) ||
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(static_cast<int>(Layout) == static_cast<int>(RowMajor) && m_dim.actualDim() == NumInputDims-1)) {
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// m_stride is equal to 1, so let's avoid the integer division.
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eigen_assert(m_stride == 1);
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Index inputIndex = index * m_inputStride + m_inputOffset;
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EIGEN_ALIGN_MAX typename internal::remove_const<CoeffReturnType>::type values[packetSize];
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for (int i = 0; i < packetSize; ++i) {
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EIGEN_ALIGN_MAX typename internal::remove_const<CoeffReturnType>::type values[PacketSize];
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for (int i = 0; i < PacketSize; ++i) {
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values[i] = m_impl.coeff(inputIndex);
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inputIndex += m_inputStride;
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}
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@@ -226,13 +226,13 @@ struct TensorEvaluator<const TensorChippingOp<DimId, ArgType>, Device>
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} else {
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const Index idx = index / m_stride;
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const Index rem = index - idx * m_stride;
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if (rem + packetSize <= m_stride) {
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if (rem + PacketSize <= m_stride) {
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Index inputIndex = idx * m_inputStride + m_inputOffset + rem;
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return m_impl.template packet<LoadMode>(inputIndex);
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} else {
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// Cross the stride boundary. Fallback to slow path.
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EIGEN_ALIGN_MAX typename internal::remove_const<CoeffReturnType>::type values[packetSize];
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for (int i = 0; i < packetSize; ++i) {
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EIGEN_ALIGN_MAX typename internal::remove_const<CoeffReturnType>::type values[PacketSize];
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for (int i = 0; i < PacketSize; ++i) {
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values[i] = coeff(index);
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++index;
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}
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@@ -242,6 +242,28 @@ struct TensorEvaluator<const TensorChippingOp<DimId, ArgType>, Device>
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}
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}
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EIGEN_DEVICE_FUNC EIGEN_STRONG_INLINE TensorOpCost
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costPerCoeff(bool vectorized) const {
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double cost = 0;
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if ((static_cast<int>(Layout) == static_cast<int>(ColMajor) &&
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m_dim.actualDim() == 0) ||
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(static_cast<int>(Layout) == static_cast<int>(RowMajor) &&
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m_dim.actualDim() == NumInputDims - 1)) {
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cost += TensorOpCost::MulCost<Index>() + TensorOpCost::AddCost<Index>();
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} else if ((static_cast<int>(Layout) == static_cast<int>(ColMajor) &&
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m_dim.actualDim() == NumInputDims - 1) ||
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(static_cast<int>(Layout) == static_cast<int>(RowMajor) &&
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m_dim.actualDim() == 0)) {
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cost += TensorOpCost::AddCost<Index>();
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} else {
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cost += 3 * TensorOpCost::MulCost<Index>() + TensorOpCost::DivCost<Index>() +
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3 * TensorOpCost::AddCost<Index>();
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}
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return m_impl.costPerCoeff(vectorized) +
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TensorOpCost(0, 0, cost, vectorized, PacketSize);
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}
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EIGEN_DEVICE_FUNC EIGEN_STRONG_INLINE CoeffReturnType* data() const {
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CoeffReturnType* result = const_cast<CoeffReturnType*>(m_impl.data());
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if (((static_cast<int>(Layout) == static_cast<int>(ColMajor) && m_dim.actualDim() == NumDims) ||
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@@ -298,6 +320,9 @@ struct TensorEvaluator<TensorChippingOp<DimId, ArgType>, Device>
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typedef typename XprType::Index Index;
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typedef DSizes<Index, NumDims> Dimensions;
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typedef typename XprType::Scalar Scalar;
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typedef typename XprType::CoeffReturnType CoeffReturnType;
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typedef typename PacketType<CoeffReturnType, Device>::type PacketReturnType;
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static const int PacketSize = internal::unpacket_traits<PacketReturnType>::size;
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enum {
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IsAligned = false,
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@@ -309,9 +334,6 @@ struct TensorEvaluator<TensorChippingOp<DimId, ArgType>, Device>
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: Base(op, device)
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{ }
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typedef typename XprType::CoeffReturnType CoeffReturnType;
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typedef typename PacketType<CoeffReturnType, Device>::type PacketReturnType;
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EIGEN_DEVICE_FUNC EIGEN_STRONG_INLINE CoeffReturnType& coeffRef(Index index)
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{
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return this->m_impl.coeffRef(this->srcCoeff(index));
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@@ -320,17 +342,16 @@ struct TensorEvaluator<TensorChippingOp<DimId, ArgType>, Device>
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template <int StoreMode> EIGEN_DEVICE_FUNC EIGEN_STRONG_INLINE
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void writePacket(Index index, const PacketReturnType& x)
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{
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static const int packetSize = internal::unpacket_traits<PacketReturnType>::size;
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EIGEN_STATIC_ASSERT(packetSize > 1, YOU_MADE_A_PROGRAMMING_MISTAKE)
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EIGEN_STATIC_ASSERT(PacketSize > 1, YOU_MADE_A_PROGRAMMING_MISTAKE)
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if ((static_cast<int>(this->Layout) == static_cast<int>(ColMajor) && this->m_dim.actualDim() == 0) ||
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(static_cast<int>(this->Layout) == static_cast<int>(RowMajor) && this->m_dim.actualDim() == NumInputDims-1)) {
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// m_stride is equal to 1, so let's avoid the integer division.
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eigen_assert(this->m_stride == 1);
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EIGEN_ALIGN_MAX typename internal::remove_const<CoeffReturnType>::type values[packetSize];
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EIGEN_ALIGN_MAX typename internal::remove_const<CoeffReturnType>::type values[PacketSize];
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internal::pstore<CoeffReturnType, PacketReturnType>(values, x);
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Index inputIndex = index * this->m_inputStride + this->m_inputOffset;
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for (int i = 0; i < packetSize; ++i) {
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for (int i = 0; i < PacketSize; ++i) {
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this->m_impl.coeffRef(inputIndex) = values[i];
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inputIndex += this->m_inputStride;
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}
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@@ -342,14 +363,14 @@ struct TensorEvaluator<TensorChippingOp<DimId, ArgType>, Device>
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} else {
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const Index idx = index / this->m_stride;
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const Index rem = index - idx * this->m_stride;
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if (rem + packetSize <= this->m_stride) {
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if (rem + PacketSize <= this->m_stride) {
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const Index inputIndex = idx * this->m_inputStride + this->m_inputOffset + rem;
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this->m_impl.template writePacket<StoreMode>(inputIndex, x);
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} else {
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// Cross stride boundary. Fallback to slow path.
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EIGEN_ALIGN_MAX typename internal::remove_const<CoeffReturnType>::type values[packetSize];
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EIGEN_ALIGN_MAX typename internal::remove_const<CoeffReturnType>::type values[PacketSize];
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internal::pstore<CoeffReturnType, PacketReturnType>(values, x);
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for (int i = 0; i < packetSize; ++i) {
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for (int i = 0; i < PacketSize; ++i) {
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this->coeffRef(index) = values[i];
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++index;
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}
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